Click a net label to trace it — endpoints colour-coded input · output · in/out — click an IC box (either panel) to select it in both, click again to deselect (multi-select OK), Esc clears all. Use the IC rail on the far left to jump straight to a chip. A net name shown muted like this and prefixed $ is ours - a node the 1985 drawing leaves unlabelled; every other name was read off the drawing. Hover a pin for its net's story.
Notes and open questions on this sheet (12)
Not yet walked against a physical board. The 98 pins and 50 nets on this sheet were read from the original drawing and cross-checked against MAME; every IC is still marked auto. Part numbers and pin assignments are what the drawing shows, not what has been metered.
Extraction uncertainty: 9D pin 13 net: printed 'CHHFLIP' followed by a solid inked blob roughly the size of a lowercase letter, sitting on the baseline at about half cap height, with no visible counter. Cannot resolve - candidates are a, e, o or a Greek alpha/beta suffix. Recorded as 'CHHFLIP?'. It is DEFINITELY a suffixed variant and must NOT be merged with the plain CHHFLIP that feeds 5F pin 1.
Extraction uncertainty: '4-3H' (10C pins 10 and 14, from 5/8): the middle glyph is short and thick and sits at mid height. It reads as a hyphen but could equally be a centred multiplication dot ('4.3H'). Transcribed as printed: 4-3H.
Extraction uncertainty: 'V1' (8E pin 6): digit-1 vs letter-I is ambiguous in this hand lettering, but the V4/V2/V1 series makes the digit reading near-certain.
Extraction uncertainty: 10D/11D pin 1 is printed 'CL' (or 'CT' - the glyph is blotted). A bar could not be confirmed at this resolution, so none is recorded. It is tied to +5, which is the inactive state for an active-low clear.
Extraction uncertainty: 11E pin 2 net printed 'AC8': 8-vs-B checked at high zoom, it is the digit 8 (two closed loops).
Discrepancy vs IC index: The same horizontal counter bit appears under two different printed spellings on this one sheet, both bracketed 'from 5/8': '4H' clocks 8E pin 9, and 'H4' feeds 9E pin 9. Both were read at 8x zoom and the letter/digit order really is reversed between them. Functionally they should be the same weight-4 H bit (the 4-dot fetch boundary), but they are recorded as printed, as two distinct net names. Worth resolving against sheet 5/8.
Discrepancy vs IC index: 11D's CLK (11), S1 (10) and S0 (9) are drawn as short horizontal stubs that stop in the ~55 px gap between the 10D and 11D outlines, with no drawn wire back to 10D's CLK/S1/S0 lines. They sit on exactly the same three rows as 10D's, and the circuit only works if the two registers share control, so they are recorded as CH6M/$S1/$S0. This is inference, not a drawn connection.
Discrepancy vs IC index: 11E is a 27128 as printed AND as wired: 28-pin footprint, A13 on pin 26, /PGM on 27, VPP on 1, /CE on 20, /OE on 22, all 14 address lines in use. There is no sign of a smaller part here - the full 16 KB is addressed (1024 chars x 8 rows x 2 bytes).
Discrepancy vs IC index: Two apparent wire crossings that are NOT connections were confirmed by the deliberate gaps drawn in the crossing line: (a) the '+5' rail feeding 10C pins 11 and 13 hops over the 4-3H vertical, and (b) the 4-3H vertical and the 4A stub hop over that same +5 rail. (c) The $FLIPBUF vertical hops over the 5F output, the 6M line and the CHHFLIP? line. (d) The CH6M vertical hops over the 9D pin 11 -> 10C pin 1 wire. Each was verified pixel-by-pixel.
Discrepancy vs IC index: 9D pin 6 and 9D pin 8 are two DIFFERENT derived flip signals whose vertical runs sit only ~50 px apart and, at x=1983, share a column with the unrelated CH6M vertical. They must not be collapsed into one another or into CHVFLIP/CHHFLIP.
BOARD FACT, confirmed by Robert against a factory Capcom board: the five ROM slots in column N are silkscreened 8N, 9N, 10N, 12N and 13N. Capcom's designators here are LABELS, not grid coordinates - the slot labelled 10N physically sits level with the 6809 at 11L, and 12N level with the sound CPU. On Robert's board 8N, 10N and 12N are fitted (27256, 27128, 27256) and 9N and 13N are empty. Three 32K and two 16K parts, 128K in total, which is the parent `gng` ROM set - and the board is confirmed to run it. The board-photo positions for these slots are pinned to their measured centres rather than derived from the grid, because the grid cannot express this.
