Click a net label to trace it — endpoints colour-coded input · output · in/out — click an IC box (either panel) to select it in both, click again to deselect (multi-select OK), Esc clears all. Use the IC rail on the far left to jump straight to a chip. A net name shown muted like this and prefixed $ is ours - a node the 1985 drawing leaves unlabelled; every other name was read off the drawing. Hover a pin for its net's story.
Notes and open questions on this sheet (12)
Not yet walked against a physical board. The 252 pins and 122 nets on this sheet were read from the original drawing and cross-checked against MAME; every IC is still marked auto. Part numbers and pin assignments are what the drawing shows, not what has been metered.
Extraction uncertainty: The bottom-edge clock label reads as two glyphs identical in this hand: most likely 8B, but BB cannot be ruled out. It arrives from 2/9.
Extraction uncertainty: 8D vs 9D ownership of the V8F inverter is the one genuinely free choice; every other assignment is forced by the no-duplicate-gate rule.
Extraction uncertainty: The 2114 /CE and /WE labels appear to carry overbars but the bar sits close to the wire; treat as probable rather than certain.
Extraction uncertainty: RA3's own pin numbers are not printed.
Discrepancy vs IC index: ANSWER TO THE 96-vs-128 QUESTION: nothing on this sheet limits the transfer to 96. The 2114s have A9 strapped to GND so the local store is 512x8 = 128 four-byte records, and RA3 forces AB12-AB9 = 1111 so the DMA reads CPU 1E00-1FFF, the whole 128-record window. The cut to 96 comes from /OVER96 arriving from sheet 2/9, which gates both the DMA request and the output selects. The sheet title is a statement about the counter, not about the RAM.
Discrepancy vs IC index: There are THREE 74LS245s with no reference designator, not one: the block lettered '245 x 2' is two stacked symbols, plus a third for data. Searched inside, above and below all three at 4-6x; the designators are simply not on this drawing.
Discrepancy vs IC index: This circuit is a DMA MASTER, not a slave. DIR on the address pair is tied to GND so data flows B->A: the object counter on 2/9 drives the CPU's address bus, with /RDB forced low through the same package.
Discrepancy vs IC index: The Y comparison is TWO cascaded 8-bit adds, not one. 9E/9F add the inverted V counter to a FLIP-dependent constant, then 10E/10F add the object's Y byte. 10F's sum outputs are not drawn at all.
Discrepancy vs IC index: The sheet prints FLIP at BOTH ends of the 8D double-inverter chain - two different nodes separated by two inversions. The buffered copy is board-scoped as $FLIPB so they cannot false-join.
Discrepancy vs IC index: /BLCNTEN at CN-1 B23 is an OUTPUT of this sheet, not an input as the connector position suggests.
Discrepancy vs IC index: The '283 carry labels are laid out unusually: the left-hand chip's C0 is the carry IN and the right-hand chip's C4 the carry OUT feeding it, so 9F/10F are the low nibbles.
