Click a net label to trace it — endpoints colour-coded input · output · in/out — click an IC box (either panel) to select it in both, click again to deselect (multi-select OK), Esc clears all. Use the IC rail on the far left to jump straight to a chip. A net name shown muted like this and prefixed $ is ours - a node the 1985 drawing leaves unlabelled; every other name was read off the drawing. Hover a pin for its net's story.
Notes and open questions on this sheet (18)
Not yet walked against a physical board. The 338 pins and 96 nets on this sheet were read from the original drawing and cross-checked against MAME; every IC is still marked auto. Part numbers and pin assignments are what the drawing shows, not what has been metered.
Extraction uncertainty: The unlabelled 74LS139 in the top-left corner really has NO reference designator printed. I zoomed the symbol and its surroundings at 7x and 22x; the box contains only 'A', 'B', 'EN' and '139'. This is the '139 whose designator the earlier pass could not read - it is not readable because it is not there.
Extraction uncertainty: '/DISPIMα' - the fifth glyph is a plain vertical stroke identical to the 'I' in 'DIS'. It could equally be T or 1. On the sister board (Commando) the corresponding signal was DISPTM. Recorded as printed: DISPIM. Needs a bench/board check.
Extraction uncertainty: '/LVIα' and 'LV1' - same 1/I problem. The unbarred label near the top ('LV1, to 2/9, 3/9') uses the same stroke as the '1' in the V1 counter labels, so I have written LV1 there; the barred label at 0.87/0.395 is written /LVIα because that is the glyph shape. They are almost certainly the same root name.
Extraction uncertainty: The trailing character on DISPIM, LVI and OBHFLIP is a small round-bodied glyph with a descender - a Greek alpha, matching the Capcom habit. Written as α.
Extraction uncertainty: Vβ3..Vβ0 - confirmed Greek beta at 18x (clear descender), NOT the letter B.
Extraction uncertainty: '4·3H' (input via connector C4, from 3/9) - the middle glyph is a centred dot. Could be a hyphen. Transcribed as printed.
Extraction uncertainty: $AD8: the wire on the far side of jumper J6, which feeds the bank decoder's A input, is unlabelled and simply runs up the page to a dead end at y~0.073. AD8 is the only sprite-code bit not otherwise used on the sheet, and the decode (Y0=00, Y1=01, Y2=10 over {AD9,X}) only makes sense if X=AD8, so I coined $AD8. It is NOT printed.
Extraction uncertainty: The CLK, S0 and S1 pins of 1K, 2K and 3K are drawn as short unterminated stubs; only 4K's are wired. I have bussed all four to the same nets because the circuit cannot work otherwise, but the drawing does not show the connection.
Extraction uncertainty: 2F: part number not printed anywhere. The symbol is a single-input gate with pin 9 in and pin 8 out (a valid 74LS04 pair), but bubbles are drawn on BOTH the input and the output, so I will not claim it inverts.
Extraction uncertainty: 10K first half, pin 2 (A): its wire runs left along y~0.335 and its left end merges visually with the 11K package outline at x~0.626. The only wire that can be there is the 11K Q1 net (which also feeds 9K pin 15), so I recorded $11KQ1. Worth a board check.
Extraction uncertainty: The bubble on 8K's inverter symbols is sometimes drawn on the input side rather than the output. The part is printed '04 so the function is not in doubt, but do not read anything into the bubble position.
Discrepancy vs IC index: The three /CE stubs on the L-bank EPROMs (1L, 2L, 3L pin 20) are short horizontal wires that stop roughly 20 px (0.05 inch at 400 dpi) short of the decoder lines that feed the matching N-bank chips. Nothing else on the sheet can drive them, and the machine needs one N chip plus one L chip enabled together to make a 16-bit fetch, so I have joined them to /$OBROM2/1/0. Flagged because the drawing does not show contact.
Discrepancy vs IC index: The Japanese note at the left says: 'J2 to J6 are pads for 0-ohm resistors. When using 27256, short J2, J3 and J5 with 0-ohm resistors. When using 27128, short J4 and J6 with 0-ohm resistors.' As drawn, J4 and J6 are shown solid (shorted) and J3/J5 open or dotted, consistent with the 27128 x 3 legend on the EPROM boxes.
Discrepancy vs IC index: Two boxes both carry the designator 10K. They are the two halves of one 74LS139, so this is not an error in the drawing, but a naive reader will count two packages.
Discrepancy vs IC index: 14K pin 9 (D3) is not drawn even though a 7611/TBP24S10 is 256 x 4. Only D0, D1, D2 are used.
Discrepancy vs IC index: 11K pin 8 (GND) and pin 16 (VCC) are not drawn, as is normal for this drawing style.
BOARD FACT, read from the physical board by Robert - and note the board's own ROM positions are NOT the schematic's designators on this bootleg: tiles 3A, 3B, 3C = 27256, stickers 6, 7, 8 (1A, 1B, 1C empty) sprites 1L, 1N = 27128, stickers 9, 10 sprites 4L, 4N = 27256, stickers 19, 20 (3L, 3N empty) Capcom's drawing places the tile ROMs at 1B/1C/1E + 3B/3C/3E and the sprite ROMs at 1L/2L/3L + 1N/2N/3N, so the physical layout has been rearranged. Capacity still reconciles exactly: 3 x 32K tiles = 96K, and 2 x 32K + 2 x 16K sprites = 96K, matching the 6 x 16K each that the drawing spreads over twice as many packages.
