Click a net label to trace it — endpoints colour-coded input · output · in/out — click an IC box (either panel) to select it in both, click again to deselect (multi-select OK), Esc clears all. Use the IC rail on the far left to jump straight to a chip. A net name shown muted like this and prefixed $ is ours - a node the 1985 drawing leaves unlabelled; every other name was read off the drawing. Hover a pin for its net's story.
Notes and open questions on this sheet (10)
Not yet walked against a physical board. The 208 pins and 115 nets on this sheet were read from the original drawing and cross-checked against MAME; every IC is still marked auto. Part numbers and pin assignments are what the drawing shows, not what has been metered.
Extraction uncertainty: item: 6B pin 15 net 'SHFLIPa'; issue: printed as SHFLIP followed by a small filled round glyph. Could be Greek alpha, a lowercase 'a', or a degree mark. It is definitely a SUFFIXED, DISTINCT net from SHFLIP (different side of a flip-flop), so do not merge it with 6A pin 12's SHFLIP. Ask the owner which glyph.
Extraction uncertainty: item: 6B pin 9 clock 'S0H'; issue: the middle glyph is a round O/0 and cannot be separated at 400 DPI. Read as S0H because 5A takes S2H and 6A takes S4H; but O-vs-zero is unconfirmed.
Extraction uncertainty: item: 10D pin 11 clock 'OH'; issue: same O-vs-zero ambiguity. Printed 'OH', from 4/9. No overbar visible.
Extraction uncertainty: item: 14A pin 13; issue: the label is a barred glyph that reads as 'CL' (possibly 'CLR'). Recorded as /CL. It is tied to +5 either way.
Extraction uncertainty: item: SH256 on 9A pin 10; issue: the label is partly struck through on the scan ('SH256' overwritten). Read as SH256, consistent with the bottom-edge bundle label 'SH2, SH256 ~ SH16'.
Extraction uncertainty: item: AB10..AB0 vs AB1O etc.; issue: the hand-lettered zeros in AB10 / AB0 are drawn as round O. Read as digits throughout because the bundle is labelled 'AB10 ~ AB0'.
Discrepancy vs IC index: item: expected list vs sheet; detail: All twelve expected ICs are present and their part numbers match as printed. The sheet additionally carries three single gates/flip-flops (11C '86, 14A '74, 1J '32) that the earlier visual pass missed.
Discrepancy vs IC index: item: 1J gate symbol; detail: Printed part number is '32 (OR) but the symbol is an AND body with bubbles on both inputs AND on the output. That is the correct De Morgan dual of OR, so part and function agree; recording the part as printed ('32) per rule 6.
Discrepancy vs IC index: item: 7A enables; detail: /OE (pin 20) and /CE (pin 18) are both hard-wired to ground alongside the GND pin. The RAM is permanently selected and output-enabled; access is arbitrated purely by the '157 address mux and the muxed /WE.
